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16-bit, 100 ksps pulsar differential adc in msop AD7684 rev. 0 in fo rmation furn is h e d by an al o g dev i ces is believed to be a ccu rate and r e liable. how e ver, no r e spons i bili ty is assumed by analog devices fo r its use, nor f o r an y i n fri n geme nt s of p a t e nt s or ot her ri g h t s o f th ird parties th at may result fro m its use . specifications subject to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot he rwi s e un der a n y p a t e nt or p a t e nt r i ghts of anal og de vices. trad emarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features 16-bit resolut i on with no missing codes throughput: 100 ksps inl : 1 lsb typ, 3 lsb max true differenti a l analog input range: v re f 0 v to v re f with v re f up to vdd on both inputs single-supply operation: 2.7 v to 5.5 v serial interf ace spi- ? /qspi-?/microwire-?/dsp-compatible power dissipat ion : 4 mw @ 5 v, 1.5 m w @ 2. 7 v, 150 w @ 2. 7 v / 10 ksps standby curre nt: 1 na 8-lea d msop package applic ati o ns battery-powered eq uipment data acq u isitio n instrumentation medical instr u ments process control applic ation diagram AD7684 ref gnd vdd +in ?in dclock d out cs 3-wire spi interface 0.5v to vdd 2.7v to 5.5v 04302-001 0 v ref 0 v ref fi g u r e 1 . table 1. msop , qfn (lfcsp)/sot-23, 16-bi t pulsar adcs type 100 ksps 250 ksps 500 ksps true differential AD7684 ad7687 ad7688 pseudo differential/uni polar ad7683 ad7685 ad7694 ad7686 unipol ar ad7680 general description the AD7684 is a 16-b i t, c h a r g e r e dis t r i b u tio n , succes s i v e a p p r o x im a t ion, pu lsar ? a n alog-t o-digi tal co n v er t e r (ad c ) tha t o p er a t es f r o m a sin g l e p o w e r s u p p l y , vd d , betw een 2.7 v t o 5.5 v . i t co n t ain s a lo w p o w e r , hig h sp ee d , 16-b i t s a m p l i n g ad c wi t h n o m i ssin g co des, an in t e r n a l con v ers i o n clo c k, and a s e r i a l , s p i-com p a t ib le in t e r f ace p o r t . th e p a r t a l s o co n t a i n s a lo w n o is e, wide b a ndwi d t h , sh or t a p er t u r e dela y , t r ack-an d - h o ld cir c ui t. on t h e cs fal l in g e d ge , i t s a m p les t h e v o l t ag e dif f er en ce bet w een +in a n d C i n p i n s . t h e r e f e r e n c e v o l t a g e , r e f , i s a p plie d ex ter n a l ly a n d can b e s e t u p to t h e su p p ly vol t a g e. i t s po w e r sc al e s l i n e a r l y w i th th r o u g h p u t . the AD7684 is h o us e d in a n 8-l e ad mso p p a c k a g e , wi th a n o p era t i n g t e m p era t ur e sp e c if ie d f r o m ?40c to +85c.
AD7684 rev. 0 | page 2 of 16 table of contents specifications ..................................................................................... 3 timing specifications ....................................................................... 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 te r m i no l o g y ...................................................................................... 8 typical performance characteristics ............................................. 9 application information ................................................................ 12 circuit information .................................................................... 12 converter operation .................................................................. 12 transfer functions ...................................................................... 12 typical connection diagram ................................................... 13 analog input ............................................................................... 13 driver amplifier choice ............................................................ 13 voltage reference input ............................................................ 14 power supply ............................................................................... 14 digital interface .......................................................................... 14 layout .......................................................................................... 14 evaluating the AD7684s performance .................................... 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 10/04initial version: revision 0
AD7684 rev. 0 | page 3 of 16 specifications vdd = 2.7 v to 5.5 v; v ref = vdd; t a = C40c to +85c, unless otherwise noted. table 2. parameter conditions min typ max unit resolution 16 bits analog input voltage range +in ? (Cin) ?v ref +v ref v absolute input voltage +in, Cin ?0.1 vdd + 0.1 v analog input cmrr f in = 100 khz 65 db leakage current at 25c acquisition phase 1 na input impedance see the analog input section. throughput speed complete cycle 10 s throughput rate 0 100 ksps dclock frequency 0 2.9 mhz reference voltage range 0.5 vdd + 0.3 v load current 100 ksps, v +in = v ?in = v ref /2 = 2.5 v 50 a digital inputs logic levels v il ?0.3 0.3 vdd v v ih 0.7 vdd vdd + 0.3 v i il ?1 +1 a i ih ?1 +1 a input capacitance 5 pf digital outputs data format serial 16 bits twos complement. v oh i source = ?500 a vdd ? 0.3 v v ol i sink = +500 a 0.4 v power supplies vdd specified performance 2.7 5.5 v vdd range 1 2.0 5.5 v operating current 100 ksps throughput vdd = 5 v 800 a vdd = 2.7 v 560 a standby current 2 , 3 vdd = 5 v, 25 c 1 50 na power dissipation vdd = 5 v 4 6 mw vdd = 2.7 v 1.5 mw vdd = 2.7 v, 10 ksps throughput 2 150 w temperature range specified performance t min to t max ?40 +85 c 1 see the sectio n for more information. typical performan ce characteristics 2 with all digital inputs forced to vdd or gnd, as required. 3 during acquisition phase.
AD7684 rev. 0 | page 4 of 16 vdd = 5 v; v ref = vdd; t a = C40c to +85c, unless otherwise noted. table 3. parameter conditions min typ max unit accuracy no missing codes 16 bits integral linearity error ?3 1 +3 lsb transition noise 0.5 lsb gain error 1 , t min to t max 2 15 lsb gain error temperature drift 0.3 ppm/c zero error 1 , t min to t max 0.4 1.6 mv zero temperature drift 0.3 ppm/c power supply sensitivity vdd = 5 v 5% 0.05 lsb ac accuracy signal-to-noise f in = 1 khz 88 91 db 2 spurious-free dynamic range f in = 1 khz ?108 db total harmonic distortion f in = 1 khz ?106 db signal-to-(noise + distortion) f in = 1 khz 88 91 db effective number of bits f in = 1 khz 14.8 bits 1 see the section. these specif ications include full temperature range va riation, but do not include the error contribution from the external reference. terminology 2 all specifications in db are referred to a full-scale input, fs. tested with an input signal at 0.5 db below full scale, unles s otherwise specified. vdd = 2.7 v; v ref = 2.5 v; t a = C40c to +85c, unless otherwise noted. table 4. parameter conditions min typ max unit accuracy no missing codes 16 bits integral linearity error ?3 1 +3 lsb transition noise 0.85 lsb gain error 1 , t min to t max 2 15 lsb gain error temperature drift 0.3 ppm/c zero error 1 , t min to t max 0.7 3.5 mv zero temperature drift 0.3 ppm/c power supply sensitivity vdd = 2.7 v 5% 0.05 lsb ac accuracy signal-to-noise f in = 1 khz 86 db 2 spurious-free dynamic range f in = 1 khz ?100 db total harmonic distortion f in = 1 khz ?98 db signal-to-(noise + distortion) f in = 1 khz 86 db effective number of bits f in = 1 khz 14 bits 1 see the section. these specific ations do include full temperature range variation, but do not include the error co ntribution from the external reference. terminology 2 all specifications in db are referred to a full-scale input fs. tested with an input signal at 0.5 db below full scale, unless otherwise specified.
AD7684 rev. 0 | page 5 of 1 6 timing specifica t ions vd d = 2.7 v t o 5.5 v ; t a = ?40c t o +85c, un les s o t h e r w is e no t e d . table 5. p a r a m e t e r s y m b o l m i n t y p m a x u n i t throughput rat e t cy c 1 0 0 k h z cs falling to dclock low t csd 0 s cs falling to dclock rising t su cs 2 0 n s dclock falling to da ta remains valid t hdo 5 1 6 n s cs rising edge to d ou t high impedance t dis 1 4 1 0 0 n s dclock falling to data valid t en 1 6 5 0 n s acquisition tim e t acq 4 0 0 n s d ou t fall t ime t f 1 1 2 5 n s d ou t rise time t r 1 1 2 5 n s 04302-002 d out dclock complete cycle power down cs d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 (msb) (lsb) hi-z 0 hi-z t acq t dis 0 14 5 t hdo t en t csd t sucs t cyc note: a minimum of 22 clock cycles are required for 16-bit conversion. shown are 24 clock cycles. d out goes low on the dclock falling edge following the lsb reading. fi g u r e 2 . s e r i a l i n t e r f a c e t i m i n g
AD7684 rev. 0 | page 6 of 1 6 absolute maximum ra tings table 6. p a r a m e t e r r a t i n g analog inputs +in 1 , Cin 1 gnd ? 0.3 v to vdd + 0.3 v or 130 ma ref gnd ? 0.3 v to vdd + 0.3 v supply voltages vdd to gnd ?0.3 v to +6 v digital inputs to gnd ?0.3 v to vdd + 0.3 v digital outputs to gnd ?0.3 v to vdd + 0.3 v storage temperature range ?65c to +150c junction tempe r ature 150c ja thermal impedance 200c/w jc thermal imp e dance 44c/w lead temperature range vapor phase (60 sec) 215c infrared (15 sec) 220c 1 s e e the s e ctio n. a n al o g i n p u t s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y ; f u n c t i o n al o p era t ion o f t h e de vice a t t h es e o r an y o t h e r con d i t io ns a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n o f t h is sp e c if ic a t io n is no t im plie d . e x p o sur e t o a b s o l u te max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . esd c a ution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity. 04302-003 500 ai ol 500 ai oh 1.4v to d out c l 100pf f i gure 3 . l o a d cir c ui t fo r di g i ta l inter f a c e t i mi ng 0.8v 2v 2v 0.8v 0.8v 2v t delay t delay 04302-004 f i gure 4. v o ltag e r e ferenc e l e vels fo r t i ming 04302-005 d out 90% 10% t r t f fi g u r e 5 . d ou t r i s e and f a ll ti m i ng
AD7684 rev. 0 | page 7 of 1 6 pin conf igura t ion and fu nction descriptions 04302-006 ref 1 +in 2 ?in 3 gnd 4 vdd 8 dclock 7 d out 6 cs 5 AD7684 top view (not to scale) f i g u re 6. 8-l e ad m s op pin conf ig u r at ion ta ble 7. pi n f u nct i on d e s c ri pt i o ns pin no. mnemonic type 1 function 1 r e f a i reference input voltage. the ref range is from 0.5 v to vdd. it i s referre d to the gnd pin. t h is pin should be decoupled closely to the pin with a ceramic c a pacitor of a fe w f. 2 +in ai differential positive analog input. 3 Cin ai differential negative analog input. 4 gnd p power supply g r ound. 5 cs di chip select inpu t. on its falling e d ge, it initiates the conver sion s. the part returns in shutdown mode as soon a s the con version i s d o ne. it also ena b les d ou t . when high, d ou t is high impedance. 6 d ou t do serial data output. the conver sion result is output on this pi n. it is synchro n ized to sck. 7 dclock di serial data clock input. 8 v d d p p o w e r s u p p l y . 1 a i = a n al og input; di = digital inpu t; do = digital output; and p = power.
AD7684 rev. 0 | page 8 of 1 6 terminology i n t e g r a l n o nlin ea ri ty e r r o r (inl) li n e a r i t y e r r o r r e f e r s t o th e devia t i o n o f ea ch in d i v i d u al code f r o m a line dr a w n f r o m nega t i ve f u l l s c a l e t h ro ug h p o si t i ve f u l l scale . th e po i n t used a s n e ga ti v e f u l l s c ale o c c u rs ? ls b befo r e th e f i r s t co d e tra n si ti o n . p o si ti v e full scale i s d e f i n e d a s a lev e l 1? l s b b e y o n d th e la s t cod e tra n si ti o n . th e de vi a t i o n i s m e as ur ed f r o m th e middle o f eac h co de t o th e t r ue s t ra ig h t lin e (s ee f i gur e 21). d i f f erenti a l n o n l i n e a r i ty e r ror ( d n l ) i n a n i d e a l a d c , c o d e t r ans i t i ons are 1 l s b a p ar t . dn l i s t h e maxim u m d e v i a t io n f r o m t h i s i d e a l va l u e . i t is o f t e n sp e c if ie d i n te r m s of re s o lut i on for w h i c h n o m i ss i n g c o d e s are g u ar an te e d . z e ro e r ro r z e r o er r o r is t h e dif f er en ce b e t w e e n t h e i d e a l mids cale v o l t a g e , i . e . , 0 v , an d t h e ac t u al v o l t a g e pr o d ucin g t h e mi ds cale o u t p u t c o d e , i . e . , 0 l s b . ga in er r o r the f i rs t tra n si t i o n (f r o m 100 . . . 00 t o 100 . . . 0 1 ) s h o u ld o c c u r a t a l e vel ? l s b ab ove t h e nomi na l ne g a t i ve f u l l s c a l e (?4.999924 v f o r th e 5 v ra n g e). th e last tra n si tio n (f r o m 01110 t o 01111) sh o u ld o c c u r f o r a n a n alog v o l t a g e 1? ls b be lo w t h e n o minal f u l l s c ale (4.999771 v f o r th e 5 v ra n g e . ) th e ga i n er r o r is t h e de v i a t ion o f t h e di f f er en ce b e tw e e n th e a c t u al lev e l o f th e las t tra n si ti o n a n d th e a c t u al lev e l o f th e f i r s t tra n s i ti o n f r o m th e d i f f e r e n ce bet w een t h e i d ea l e v e l s . s p uri o us-f r e e d y na mi c r a n g e (s fd r) s f d r is t h e dif f er en ce , i n de c i b e ls (db), b e tw e e n t h e r m s a m pli t ude o f t h e in p u t sig n al and t h e p e a k s p u r io us sig n al . e f f e c t iv e n u mb er of b i ts (eno b) en o b is a m e asur em en t o f t h e r e s o l u t i o n wi t h a sine w a v e in p u t. i t is r e l a t e d t o s/(n+ d ) b y t h e fol l o w in g fo r m u l a [ ] ( ) 02 . 6 / 76 . 1 / ? + = db d n s enob a nd is ex p r ess e d in b i ts. t o t a l ha r m on i c d i s t or t i on ( t h d ) t h d i s t h e ra tio o f th e rm s s u m o f th e f i r s t f i v e h a rm o n i c co m p on e n ts t o t h e r m s val u e o f a f u l l -s cale in pu t sig n al an d is exp r es s e d i n db . s i g n a l -t o-n o is e r a ti o (s nr) s n r is t h e r a t i o o f t h e r m s val u e o f t h e ac t u al in p u t sig n al t o t h e r m s su m of a l l ot he r sp e c t r a l c o m p o n e n t s b e l o w t h e n y qu i s t f r e q uen c y , excl udin g ha r m o n ics a nd dc. th e val u e fo r s n r is exp r es s e d i n db . s i g n a l -t o-(n o i s e + dis t o r t i o n ) r a t i o (s/[ n+d] ) s/(n+d) is t h e ra t i o o f t h e r m s val u e o f t h e ac t u al in p u t sig n al t o th e rm s s u m o f all o t h e r s p ec tral co m p o n en ts be lo w t h e n y q u ist f r e q ue nc y , in cl udi n g har m o n ics b u t excl udin g dc. the val u e fo r s/(n+d) is exp r es s e d in db . ap e r t u r e d e l a y a p er t u r e de l a y i s a m e as ur e o f t h e ac q u isi t ion p e r f o r ma n c e and i s th e tim e be t w ee n t h e falli n g e d g e o f th e cs in p u t a nd w h en t h e in p u t sig n al is h e l d fo r a co n v ersio n . t r ansi en t resp o n s e t r ans i e n t re sp o n s e i s t h e t i m e re qu i r e d f o r t h e a d c to acc u ra t e ly ac q u i r e i t s i n p u t a f t e r a f u l l -s ca le st ep f u n c t i on was a p plie d.
AD7684 rev. 0 | page 9 of 1 6 typical perf orm ance cha r acte ristics ?3 ?2 ?1 0 1 2 3 0 16384 32768 49152 65536 code inl ( l sb) 04302-017 positive inl = +0.83lsb negative inl = ? 1.07lsb f i gure 7 . integr a l no nli n ea ri t y vs . c o d e 04302-008 151 94794 18557 17388 182 0 20000 40000 60000 80000 100000 120000 fffd fffe ffff 0000 0001 0002 0003 0004 0005 code in hex counts vdd = ref = 2.5v 0 0 0 0 f i g u re 8. his t og r a m of a dc input at t h e cod e ce nte r ? 180 ? 160 ? 140 ? 120 ? 100 ? 80 ? 60 ? 40 ? 20 0 04302-009 01 0 2 0 3 0 4 0 frequency (khz) amp l itude (db of full s c a l e ) 50 16384 point fft vdd = ref = 5v f s = 100ksps f in = 20.43khz f i g u re 9. fft plot ?3 ?2 ?1 0 1 2 3 0 16384 32768 49152 65536 code dnl (ls b ) 04302-010 positive dnl = +0.9lsb negative dnl = ? 0.45lsb f i g u re 10. d i f f e r e nt ia l n o nl in ea rit y v s . code 04302-011 123872 4150 3050 0 50000 100000 150000 fffb fffc fffd fffe ffff code in hex counts 0 0 vdd = ref = 5v f i g u re 11. h i s t og r a m of a dc input at t h e cod e ce nte r ? 180 ? 160 ? 140 ? 120 ? 100 ? 80 ? 60 ? 40 ? 20 0 04302-012 01 0 2 0 3 0 4 0 frequency (khz) amp l itude (db of full s c a l e ) 50 16384 point fft vdd = ref = 2.5v f s = 100ksps f in = 20.43khz f i g u re 12. fft p l ot
AD7684 rev. 0 | page 10 of 16 enob (bit s) 13 14 15 16 17 80 85 90 95 100 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 reference voltage (v) s nr, s / [n+d] (db) 04302-013 s/[n+d] snr enob f i gure 13. snr , s / ( n + d), a n d e n ob v s . r e fer e nce v o ltag e 70 75 80 85 90 95 100 0 5 0 100 150 200 frequency (khz) s / [n+d](db) vref = 5v, ? 1db vref = 2.5v, ?1db vref = 5v, ? 10db 04302-014 fi g u r e 1 4 . s / [ n + d ] v s . fr e q u e n c y ?115 ?110 ?105 ?100 ?95 ?90 ?85 ?80 0 4 0 8 0 120 160 200 frequency (khz) thd (db) vref = 2.5v, ?1db vref = 5v, ? 1db 04302-015 fi g u r e 1 5 . t h d, e n o b v s . fr e q u e n c y 0 200 400 600 800 1000 1200 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply (v) op e rating curre nt ( a) 04302-016 f s = 100ksps f i gure 16. o p er atin g current v s . sup p l y 0 200 400 600 800 1000 temperature ( c) op e rati n g curre nt ( a) 04302-017 ? 5 5 ? 35 ? 1 5 5 25 45 65 85 105 125 vdd = 5v vdd = 2.7v f i gure 17. o p er atin g current v s . t e mper atu r e 0 250 500 750 1000 temperature ( c) p o we r-down curre nt ( a) 04302-018 ? 5 5 ? 35 ? 1 5 5 25 45 65 85 105 125 f i gure 18. p o wer - d o wn cur r ent vs. t e mp e r atu r e
AD7684 rev. 0 | page 11 of 16 ?6 ?4 ?2 ?3 ?5 0 ?1 2 1 4 3 6 5 ? 5 5 ? 35 ? 1 5 5 25 45 65 85 105 125 temperature ( c) ze ro e rror, full-s cale e rror (ls b ) 04302-019 zero error gain error f i gure 19. o ffs et a n d g a in e r r o r v s . t e mpe r atu r e
AD7684 rev. 0 | page 12 of 16 appli c a t ion inf o rma t ion sw+ msb 16,384c +in lsb comp control logic switches control busy output code cnv ref gnd ?in 4c 2c c c 32,768c sw ? msb 16,384c lsb 4c 2c c c 32,768c 04302-020 f i gur e 2 0 . adc simpl i f ie d s c hema ti c circuit informa t ion the AD7684 is a lo w p o w e r , sin g le-s u p p l y , 16-b i t ad c usin g a successi v e a p p r o x ima t ion a r chi t e c t u r e . i t is c a p a b l e o f co n v er t- in g 100,000 s a m p les p e r s e co nd (100 ks ps) an d p o w e rs do wn bet w een co n v e r s i o n s . w h en o p e r a t i n g a t 10 k s p s , f o r e x a m p l e , i t co ns um es typ i cal l y 150 w wi th a 2.7 v s u p p ly , ideal f o r b a t t e r y - p o w e r e d ap p l i c at i o n s . the AD7684 p r o v ides the us er wi t h an o n -c hi p trac k-and-h o ld a nd do es n o t ex hib i t an y p i p e li n e d e l a y o r la te n c y , ma k i ng i t ide a l f o r m u l t i p l e , m u l t i p lexe d cha n n e l a p p l ic a t io n s . the AD7684 is s p ecif ie d f r o m 2.7 v t o 5.5 v . i t is h o us ed in a 8-lead mso p p a c k a g e . c o nverter oper a t ion the AD7684 is a s u cces si v e a p p r o x ima t ion ad c bas e d o n a ch ar ge re d i st r i but i on d a c . f i g u re 2 0 show s t h e s i m p l i f i e d s c h e ma t i c o f t h e ad c. th e c a p a ci t i v e d a c con s is ts o f tw o iden t i ca l a r r a y s o f 16 b i na r y -w eig h te d c a p a c i to rs, w h ich a r e co nne c t e d t o t h e tw o co m p a r a t o r in p u ts. duri n g th e a c q u i s i t i o n p h ase , t e rm i n als o f th e a r ra y ti ed t o th e c o m p ar a t or s i n put are c o n n e c t e d to g n d v i a s w + a n d s w ? . all i n de pen d en t s w i t ch e s a r e co n n ec t e d t o th e a n al og i n p u ts . t h us, the ca p a ci t o r a r ra ys a r e used as sam p lin g ca p a ci t o r s an d acq u ir e t h e a n al og sig n al o n t h e +in an d ?i n i n p u ts. w h e n t h e acq u isi t ion pha s e is co m p lete and t h e cs in p u t g o es lo w , a co n v ersio n phas e is ini t i a t e d . w h e n t h e con v ersio n phas e beg i n s , sw+ and sw? a r e op ened f i rs t. th e two ca p a ci t o r a r r a y s a r e t h en dis c o n n e c t e d f r o m t h e i n p u ts and co n n e c te d to t h e g n d i n p u t. ther efo r e , t h e dif f er en t i al v o l t ag e b e tw e e n t h e in p u ts, +in an d ?in, ca pt ur e d a t t h e e nd o f t h e acq u isi t ion phas e is a p plie d t o t h e com p a r a t o r in p u ts, ca usi n g t h e co m p a r a t o r t o b e co m e un bala n c ed . b y s w i t ch i n g ea c h e l em en t o f t h e c a p a ci to r a r r a y b e twe e n gnd and ref , t h e com p a r a t o r in p u t va r i es b y b i na r y -w eig h t e d v o l t a g e s t eps ( v ref /2, v ref /4...v ref /65 536). th e con t rol log i c t o g g l es th es e swi t ch es, s t a r t i n g w i th th e m s b , i n o r d e r t o b r i n g th e c o m p a r a t o r b a c k i n t o a bala n c ed co n d i ti o n . a f t e r th e co m p le ti o n o f th i s p r oce s s, t h e p a r t r e t u r n s t o t h e ac q u isi t i o n phas e an d t h e co n t r o l log i c ge ne r a te s t h e a d c output c o de . tr ansfer func tio n s the ideal tran sf er f u n c tio n f o r t h e AD7684 is sh o w n in f i gur e 21 a nd t a b l e 8. 100...000 100...001 100...010 011...101 011...110 011...111 adc code (twos comp le me nt) analog input +fs ? 1.5 lsb + fs ? 1 lsb ? fs + 1 lsb ?fs ?fs + 0.5 lsb 04302-021 f i g u re 21. a d c ide a l t r ans f er f u nc t i o n ta ble 8. out p ut codes a n d i d ea l input volt a g es description analo g input v re f = 5 v digital o u tput co de hexa fsr C 1 lsb 4.999847 v 7fff 1 midscale + 1 lsb 152.6 v 0001 midscale 0 v 0000 midscale C 1 lsb C152.6 v ffff Cfsr + 1 lsb C4.999847 v 8001 Cfsr C5 v 8000 2 1 this is al so the c o de for an overranged anal og input ( v +in C v Ci n above v re f C v gnd ). 2 this is al so the c o de for an un d e rranged anal og input ( v +i n C v Ci n below ? v re f + v gnd ).
AD7684 rev. 0 | page 13 of 16 04302-022 AD7684 ref gnd vdd ?in +in dclock d out cs 3-wire interface 100nf 2.7v to 5.25v 2.2 f to 10 f (note 2) ref 0 to v ref 33 ? 2.7nf (note 3) (note 4) (note 1) v ref to 0 33 ? 2.7nf (note 3) (note 4) note 1: see reference section for reference selection. note 2: c ref is usually a 10 f ceramic capacitor (x5r). note 3: see driver amplifier choice section. note 4: optional filter. see analog input section. note 5: see digital interface for most convenient interface mode. f i gure 22. t y pic a l a p plic at ion d i agr a m t y p i c a l c o nnec t i o n di a g r a m f i gur e 22 s h o w s a n exa m ple o f t h e r e comm e n de d a p pli c a t io n dia g ra m f o r the AD7684. anal og input f i g u re 2 3 show s an e q u i v a l e n t c i rc u i t of t h e i n put st r u c t u r e of th e AD7684. the tw o dio d es, d1 a nd d2, p r o v ide es d p r o t ec- tio n f o r th e a n alog in p u ts, +in and ?in. c a r e m u s t be t a k e n t o e n s u r e th a t th e a n alog i n p u t si g n al n e v e r e x cee d s th e s u p p l y ra i l s b y m o r e t h a n 0.3 v , b e c a us e t h is w i l l ca us e t h es e dio d es t o b e come fo r w a r d- b i as e d and st a r t co nd uc t i n g c u r r en t. h o w e ver , th es e dio d es can han d le a f o r w a r d-b i as e d c u r r en t o f 130 ma maxim u m. f o r in s t an c e , t h es e c o n d i t io ns co u l d e v en t u al l y o c c u r w h e n t h e in p u t b u f f er s (u1) s u p p lies a r e dif f er en t f r o m vd d . i n such a cas e , an i n p u t b u f f er wi t h a sh or t-cir c ui t c u r r e n t limi t a tion can b e us ed t o p r o t ec t th e p a r t . 04302-023 c in r in d1 d2 c pin +in or ? i n gnd vdd f i g u re 23. equiv a le nt a n al og input c i rcuit this a n alog in pu t s t r u c t ur e al lo ws t h e s a m p l i n g o f t h e dif f er - en t i a l sig n a l b e t w e e n +i n an d ?in. by usin g t h is dif f er en t i a l in p u t, smal l sig n als co mm on to bo th in p u ts a r e r e je c t e d . f o r i n s t a n ce , b y u s i n g ?i n t o se n s e a r e m o t e s i gn al gr o u n d , gr o u n d p o t e n t ial dif f er en ces be tw e e n t h e s e n s o r and the lo cal ad c g r o u n d a r e e l im ina t e d . d u r i n g t h e ac q u isi t ion phas e , t h e i m p e - dan c e o f t h e a n a l o g in p u t +in ca n b e mo dele d as a p a r a l l el co m b in a t ion o f t h e ca p a c i t o r c pi n an d t h e n e two r k fo r m e d b y t h e s e r i es co nne c t i o n o f r in and c in . c pi n is p r ima r i l y t h e p i n ca p a c i tan c e . r in is typ i cal l y 600 ? a nd is a l u m p ed com p on en t m a d e up of s o m e s e r i a l re s i stor s an d t h e on - r e s i s t a nc e of t h e swi t ch es. c in is typ i cal l y 30 pf a nd is ma inl y th e ad c s a m p lin g ca p a c i t o r . d u r i n g t h e con v ersion phas e , w h en t h e s w i t ch es a r e o p ene d , t h e i n pu t im p e dan c e is limi te d t o c pi n . r in an d c in mak e a 1-p o le , lo w-p a s s f i l t er tha t r e d u ces u nde sira b l e alias i n g e f f e ct s a n d li mi ts th e n o i s e . w h en t h e s o ur c e im p e dan c e o f t h e dr ivin g cir c ui t is lo w , t h e AD7684 can be dr i v en dir e c t l y . l a rg e s o ur ce im p e dan c es sig n i- f i ca n t l y a f f e c t the ac p e r f o r ma n c e , es p e c i al l y th d . th e dc p e r f o r ma n c es ar e les s s e n s i t i v e t o t h e i n p u t i m p e dan c e . driver am plifier ch o i ce al th o u g h the AD7684 is easy to dr i v e , th e dr i v er a m p l if ier n e e d s t o m e et t h e fol l o w in g r e quir em e n ts: ? the n o is e g e n e r a t e d b y t h e dr i v er a m plif ier ne e d s t o b e k e pt as lo w as p o s s i b le i n o r der t o p r es er v e t h e s n r and tra n si tion n o is e p e r f o r ma n c e o f th e AD7684. n o t e tha t the AD7684 has a no is e m u c h lo w e r tha n m o st o t her 16-b i t ad cs and , t h er efo r e , ca n b e dr iv en b y a n o isier o p a m p w h i l e p r es er v i ng t h e s a me o r b e t t er sys t em p e r f o r ma n c e . the n o is e comin g f r o m th e dr i v er is f i l t er ed b y th e AD7684 a n a l og in p u t c i r c ui t 1-p o le , lo w-p a ss f i l t er ma de b y r in an d c in o r b y t h e ex t e r n al f i l t er , if o n e is us e d . ? fo r a c ap p l i c at i o n s , t h e d r i v e r n e e d s t o h a v e a t h d p e r f o r ma n c e s u i t a b le t o tha t o f th e AD7684. f i g u r e 15 s h o w s t h e thd vs. f r e q uen c y t h a t t h e dr i v er sh o u ld e x ceed . ? f o r m u l t icha n n e l m u l t i p lexe d a p plica t io n s , t h e dr i v er a m p l if ier an d t h e AD7684 analog in p u t cir c ui t m u s t be a b le t o set t le f o r a f u ll-scale st ep o f th e ca p a ci t o r a r ra y a t a 16-b i t leve l (0.0 015%). i n t h e am p l if ier s da t a sh eet, s e t t l i n g a t 0.1 % t o 0.01 % is m o r e co mm o n l y sp ecif ie d. this co u l d d i f f e r si gn i f i c a n tl y f r o m th e se t t li n g tim e a t a 16- b i t lev e l a nd sh o u ld b e ver i f i e d p r io r to dr i v er s e le c t io n.
AD7684 rev. 0 | page 14 of 16 table 9. r e com m ende d dri v er amplifiers amplifier typical applica t ion ad8021 very low noise a n d high frequency ad8022 low noise and high frequency op184 low pow er, lo w noise, a n d low fr equency ad8605 , ad8615 5 v single-supp l y, low pow er ad8519 small, l o w p o we r, and low frequ e ncy ad8031 high frequency and low power v o l t a g e reference input the AD7684 v o l t a g e r e f e r e nce in p u t, ref , has a d y na mic in p u t im p e dan c e . i t sh o u ld t h er efo r e b e dr i v en b y a l o w im p e dance s o ur ce wi th ef f i cien t deco u p ling betw een t h e ref a n d gnd p i n s , as explai n e d in t h e l a yo u t s e c t io n. w h en ref is dr i v en b y a v e r y lo w im p e dance s o ur ce (e .g., a n un b u f f er e d r e fer e n c e v o l t a g e li k e t h e lo w t e m p era t ur e dr if t ad r43x re f e re nc e or a re f e re n c e bu f f e r u s i n g t h e ad8031 or th e ad8605 ), a 10 f (x5r , 0805 size) ceramic c h i p c a p a ci t o r is a ppropr i a t e f o r opt i m u m p e r f or m a n c e. i f d e s i re d, s m a l l e r re f e re nc e d e c o up l i ng c a p a c i t o r v a lu e s d o w n t o 2.2 f ca n be us ed wi th a minimal im p a c t on p e r f o r ma n c e , es p e c i al l y d n l. power sup p l y the AD7684 p o w e rs do wn a u t o ma tic a l l y a t t h e end o f eac h co n v ersio n phas e a nd t h er efo r e t h e p o w e r s c ales lin e a r l y wi t h th e s a m p lin g ra te , as sh o w n in f i gur e 24. this mak e s t h e p a r t ide a l f o r lo w s a m p lin g r a t e s (e ven o f a f e w h z ) a nd lo w ba t t er y- p o w e r e d ap p l i c at i o n s . 0.01 0.1 1 10 100 1000 100 10 1k 10k 100k sampling rate (sps) op e rating curre nt ( a) 04302-024 vdd = 5v vdd = 2.7v f i gure 24. o p er atin g current v s . s a mp l i ng r a te digit a l in t e rf a c e the AD7684 is co m p a t i b le wi th s p i, qs p i , dig i t a l h o s t s, and ds p s (e . g ., b l ackf in? ads p -b f 53x o r ads p -21 9 x). th e con- n e c t ion d i a g r a m is sh o w n i n f i gur e 25 a nd t h e co r r esp o n d i n g timin g is g i v e n in f i gur e 2. a fa l l in g e d ge on cs ini t ia t e s a con v ersio n and t h e da t a tra n sfer . af t e r t h e f i f t h d c l o c k fa l l ing e d ge , d ou t is ena b le d and fo r c e d lo w . th e da t a b i ts a r e t h e n clo c k e d m s b f i rs t b y s u bs e- q u en t d c l o c k fal l in g e d g e s. the da t a is vali d o n b o t h s c k e d g e s. a l t h o u g h th e r i sin g e d ge ca n be us e d t o c a p t ur e the da t a , a d i g i tal h o s t als o usi n g th e sck falli n g ed g e allo w s a fa s t e r r e adin g ra t e , p r o v ide d i t ha s a n accep t ab le h o l d t i me. 04302-025 cs dclock d out data in clk convert digital host AD7684 f i g u re 25. con n ec t i on d i ag r a m la y o u t the p r in ted cir c ui t bo a r d h o usin g th e AD7684 s h o u ld b e desig n e d s o t h a t t h e a n a l o g a nd dig i t a l s e c t io n s a r e s e p a r a te d a nd co nf i n e d to cer t a i n a r e a s o f t h e b o a r d . t h e p i n o u t o f t h e AD7684 wi t h al l i t s a n alog sig n als o n th e lef t side an d al l i t s dig i t a l sig n als o n the r i g h t side e a s e s this tas k . a v o i d r u nnin g dig i t a l li n e s u n d e r t h e d e vice b e ca us e t h es e co u p le n o is e o n t o t h e die , unless a g r o u nd plane un der t h e AD7684 is us ed as a s h ie ld . f a s t swi t c h in g sig n a l s, s u c h as cs or clo c ks, sh o u l d ne ver r u n n e a r ana l o g sig n a l p a t h s. cr o s s o ver o f dig i t a l an d ana l o g sig n a l s sh o u ld b e a v o i de d . a t leas t on e g r oun d plan e s h o u l d b e us ed . i t cou l d be comm o n o r spli t b e twe e n t h e dig i t a l an d a n a l og s e c t io n. i n such a ca s e , i t s h o u ld b e jo in e d under n e a th t h e AD7684. the AD7684 v o l t a g e r e f e r e nce in p u t ref has a d y na mic in p u t im p e d a n c e and sh o u ld b e de cou p le d wi t h min i ma l p a r a si t i c ind u c t an ces. t h is is do ne b y pla c in g t h e r e fer e nce de co u p li n g cera mic c a p a ci to r c l os e t o , a n d ideal l y r i g h t u p a g a i n s t, the ref a nd g n d p i n s a nd b y co n n e c t i n g t h es e p i ns w i t h wi de, lo w im p e dan c e t r ac es. f i nal l y , th e p o wer s u p p l y , vd d , o f th e AD7684 sh o u ld be deco u p led wi th a cera mic c a p a c i t o r , typ i cal l y 10 0 nf , a n d place d c l os e t o th e AD7684. i t s h o u ld be co nnec t e d usin g sh o r t an d la rg e t r aces t o pr o v ide lo w im p e dan c e p a t h s and r e d u ce t h e ef f e c t o f g l i t c h es o n the p o w e r su p p l y lin e s. ev al u a ting the ad76 84 s performance o t h e r r e co mm en de d l a yo u t s f o r th e AD7684 a r e o u tlined in t h e eval ua tion bo a r d f o r th e ad768 4 ( ev a l - a d 7 6 8 4 ). t h e eval ua- t i o n b o a r d p a ck a g e i n cl udes a f u l l y ass e m b le d a nd teste d e v a l ua t i on b o a r d , do c u m e n t a t i o n, a nd s o f t wa re fo r co n t r o l l in g t h e b o a r d f r o m a pc vi a t h e ev a l - c on trol br d 2 .
AD7684 rev. 0 | page 15 of 16 outline dimensions 0.80 0.60 0.40 8 0 4 85 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc coplanarity 0.10 0.23 0.08 compliant to jedec standards mo-187aa f i g u re 26. 8-l e ad m i cro s m al l o u t l in e p a ckag e [m s o p ] (rm-8) di me nsio ns sho w n i n m i ll im e t e r s ordering guide models integral nonlinearity temperature r a nge package (option) transport media, q u a n t i t y b r a n d i n g AD7684brm 3 lsb max C40c to +85c msop (rm-8) tube, 50 c1d AD7684brmrl 7 3 lsb max C40c to +85c msop (rm-8) reel, 1,000 c1d eval-AD7684c b 1 evaluation bo ar d eval-control brd2 2 controll er boar d eval-control brd3 2 controll er boar d 1 th i s boa r d ca n be use d a s a st a n da lon e eva l ua t i on boa r d or i n con j u n c t i on wi t h t h e eval- c on t r ol br d x fo r eva l u a t i on /dem on st ra t ion purpose s . 2 th ese boa r d s a l l o w a p c t o con t r ol a n d com m u n i ca t e wi t h a ll an a l og d e vi c e s eva l ua t i on boa r ds en di n g i n t h e cb de si gn a t ors.
AD7684 rev. 0 | page 16 of 16 notes ? 2004 a n al o g de v i ce s , i n c . al l ri g h t s r e s e r v e d . t r ad emark s a n d reg i ste r e d tr ad emar k s are t h e p r op e r t y of t h e i r resp e c ti v e o w ne r s . d04302-0 - 10/0 4 (0)

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